markham, on rtl design engineer Jobs – 27 Openings This Week

Verification Engineer, Senior
Qualcomm —Toronto, ON
- $104,900–$154,900 a year
- Doctoral degree
- Engineering
- Master's degree
12h
Principal Timing Engineer
Marvell —Toronto, ON
- $145,800–$194,400 a year
- Doctoral degree
- Computer Science
- Engineering
Mixed Signal Systems and Verification Engineer II
Cadence Design Systems —Toronto, ON
- $73,500–$136,500 a year
- Full-time
- Doctoral degree
- Schematics
- Engineering
- Employee stock purchase plan
- Designated paid holidays
Director, Digital Compute & Power Optimization New
Astera Labs —Toronto, ON
- $200,000–$250,000 a year
- Immediate opening
- Engineering
- Master's degree
- Bachelor's
4d
Senior Systems Engineer
Peraso Technologies Inc. —Toronto, ON
- $95,000–$120,000 a year
- Computer science
- Schematics
- Engineering
Director, Digital Compute & Power Optimization
Astera Labs —Toronto, ON
- $200,000–$250,000 a year
- Immediate opening
- Engineering
- Master's degree
- Bachelor's
5d

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Principal Timing Engineer
Marvell —Toronto, ON
1324b(a)(3), all applicants may be subject to an export license review process prior to employment. ASIC design engineer responsible for post RTL design flow.
$145,800–$194,400 a year
Principal Engineer, Digital IC Design
Marvell —Toronto, ON
1324b(a)(3), all applicants may be subject to an export license review process prior to employment. Lead the development and execution of analog mixed-signal…
$145,800–$194,400 a year

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ASIC Design Verification Engineer - Display (up to Staff)
Qualcomm —Markham, ON
Applies ASIC knowledge and experience to define, model, design (digital and/or analog), optimize, verify, validate, implement, and document IP (block/SoC)…
$124,200–$174,200 a year
ASIC Video Design Engineer
NETINT Technologies Inc. —Markham, ON
Proven expertise in logic design, micro-architecture, and RTL coding to develop groundbreaking technologies. Advanced degree in engineering (B. Eng., MSc., PhD.…
$120,000–$220,000 a year
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Verification Engineer, Senior

Qualcomm -
Toronto, ON

Apply Now

Job details

$104,900–$154,900 a year
12 hours ago

Qualifications

Doctoral degree
Engineering
Master's degree
Verilog
C++
C
Bachelor's
Ethernet
Perl
Communication skills
Python
Debugging

Full job description

Company:

Qualcomm Canada ULC

Job Area:

Engineering Group, Engineering Group > ASICS Engineering

General Summary:

As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives communication and data processing transformation to help create a smarter, connected future for all. As a Qualcomm ASIC Engineer, you will define, model, design (digital and/or analog), optimize, verify, validate, implement, and document IP (block/SoC) development for a variety of high performance, high quality, low power world class products. Qualcomm Engineers collaborate with cross-functional groups to determine product execution path.

Minimum Qualifications:

Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.

OR
Master's degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience.
OR
PhD in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.

This posting is for an existing vacancy.

We are looking for experienced SoC design verification engineers to contribute to our next generation connectivity networking products. This is an incredible opportunity to be part of the AI revolution and contribute to the complete semiconductor development cycle, from concept to product.

The ideal candidate will have a strong and extensive background in RTL verification methodologies, UVM, C and SystemVerilog. You will be responsible for driving pre-silicon verification, collaborating with cross-functional teams, and ensuring the successful validation of high-performance SoCs.

Why Join Us?

Work on cutting-edge SoC designs in advanced process nodes.
Products purpose-built for AI datacenter scale out and scale up connectivity
Work in a high-impact, fast-paced environment.
Competitive compensation and career growth opportunities.
Work alongside some of the best minds in the semiconductor industry.

What You'll Do

Build testbenches and analyze test failures to uncover bugs in IP
Integrate 3rd party VIPs for compliance testing of standard protocols
You will Build releases of our design into SoC design integration team
Take on opportunities to lead, plan, and coordinate tasks with team members
Collaborate closely with IP design, FE design, PD , PV,EM/IR and post-si teams
Contribute towards the continuous improvement of IP verification methodologies and processes

What You'll Need

Multi-year experience in Design SoC Verification
Experience in SerDes PHY, DSP, and Analog mixed signal is desirable
Knowledge in Ethernet and PCIe standards is desirable
An applied understanding of UVM and verification techniques
Experience with constrained-random verification in System Verilog and UVM
Formal Verification, and Power-aware UPF verification techniques
Tools/Languages - System Verilog, UVM, Python, Perl, C/C++
Post-Silicon Debug: Experience in post-silicon bring-up and debugging.
Communication & Leadership: Team player with strong communication skills to ensure effective program execution.

Applicants : Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail [email protected] or call Qualcomm's toll-free number found here . Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries).

Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.

To all Staffing and Recruiting Agencies : Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications.

Pay range and Other Compensation & Benefits:

$104,900.00 - $154,900.00

The above pay scale reflects the broad, minimum to maximum, pay scale for this job code for the location for which it has been posted. Even more importantly, please note that salary is only one component of total compensation at Qualcomm. We also offer a competitive annual discretionary bonus program and opportunity for annual RSU grants (employees on sales-incentive plans are not eligible for our annual bonus). In addition, our highly competitive benefits package is designed to support your success at work, at home, and at play. Your recruiter will be happy to discuss all that Qualcomm has to offer.

If you would like more information about this role, please contact Qualcomm Careers .

Apply Now

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rtl design engineer jobs in markham, on

Verification Engineer, Senior

Principal Timing Engineer

Mixed Signal Systems and Verification Engineer II

Director, Digital Compute & Power Optimization New

Senior Systems Engineer

Director, Digital Compute & Power Optimization

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